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  1k x 8 prom CY7C281A cy7c282a cypress semiconductor corporation ? 3901 north first street  san jose  ca 95134  408-943-2600 document #: 38-04003 rev. ** revised march 4, 2002 82a features ? cmos for optimum speed/power  high speed ? 25 ns (commercial) ? 30 ns (military)  low power ? 495 mw (commercial) ? 660 mw (military)  eprom technology 100% programmable  slim 300-mil or standard 600-mil dip or 28-pin lcc  5v 10% v cc , commercial and military  ttl-compatible i/o  direct replacement for bipolar proms  capable of withstanding >2001v static discharge functional description the CY7C281A and cy7c282a are high-performance 1024-word by 8-bit cmos proms. they are functionally iden- tical, but are packaged in 300-mil and 600-mil-wide packages respectively. the CY7C281A is also available in a 28-pin lead- less chip carrier. the memory cells utilize proven eprom floating-gate technology and byte-wide intelligent program- ming algorithms. the CY7C281A and cy7c282a are plug-in replacements for bipolar devices and offer the advantages of lower power, su- perior performance, and programming yield. the eprom cell requires only 12.5v for the super voltage, and low current re- quirements allow for gang programming. the eprom cells allow each memory location to be tested 100% because each location is written into, erased, and repeatedly exercised prior to encapsulation. each prom is also tested for ac perfor- mance to guarantee that after customer programming, the product will meet dc and ac specification limits. reading is accomplished by placing an active low signal on cs 1 and cs 2 , and active high signals on cs 3 and cs 4 . the contents of the memory location addressed by the address lines (a 0 ? a 9 ) will become available on the output lines (o 0 ? o 7 ). selection guide 7c281a-25 7c282a-25 7c281a-30 7c282a-30 7c281a-45 7c282a-45 maximum access time (ns) 25 30 45 maximum operating current (ma) commercial 100 100 90 military 120 120 logicblockdiagram pin configurations 1 2 3 4 5 6 7 8 9 10 11 12 16 17 18 19 20 24 23 22 21 13 14 a 8 a 7 a 6 a 5 a 4 a 3 a 2 a 1 a 0 o 0 o 1 o 2 gnd v cc o 7 o 6 o 4 o 5 o 3 a 9 a 8 a 7 a 6 a 5 a 4 a 3 a 2 a 1 a 0 o 7 o 6 o 5 o 4 o 3 o 2 o 1 o 0 cs 1 15 column decoder cs 2 cs 3 cs 4 a 9 cs 1 cs 2 cs 3 cs 4 28 4 5 6 7 8 9 10 321 27 1314151617 26 25 24 23 22 21 20 11 12 19 a 5 v cc gnd a 6 a 7 o 3 o 1 o 0 18 o 4 o 5 nc a 0 a 4 a 3 nc a 8 a 9 nc nc o 7 o 6 a 2 a 1 o 2 cs 1 cs 2 cs 3 cs 4 dip lcc/plcc top view top view 7c281a 7c282a 7c281a row decoder programmable array multiplexer
CY7C281A cy7c282a document #: 38-04003 rev. ** page 2 of 11 maximum ratings (above which the useful life may be impaired. for user guide- lines, not tested.) storage temperature .....................................? 65 c to +150 c ambient temperature with power applied ..................................................? 55 c to +125 c supply voltage to ground potential (pin 24 to pin 12) .................................................? 0.5v to +7.0v dc voltage applied to outputs in high z state .....................................................? 0.5v to +7.0v dc input voltage .................................................? 3.0v to +7.0v dc program voltage (pins 18, 20)................................13.0v static discharge voltage ........................................... >2001v (per mil-std-883, method 3015) latch-up current..................................................... >200 ma operating range range ambient temperature v cc commercial 0 c to +70 c 5v 10% industrial [1] ? 40 c to +85 c 5v 10% military [2] ? 55 c to +125 c 5v 10% electrical characteristics over the operating range [3,4] 7c281a-25 7c282a-25 7c281a-30 7c282a-30 7c281a-45 7c282a-45 parameter description test conditions min. max. min. max. min. max. unit v oh output high voltage v cc = min., i oh = ? 4.0 ma 2.4 2.4 2.4 v v ol output low voltage v cc = min., i ol = 16.0 ma 0.4 0.4 0.4 v v ih input high level guaranteed input logical high voltage for all inputs 2.0 2.0 2.0 v v il input low level guaranteed input logical low voltage for all inputs 0.8 0.8 0.8 v i ix input current gnd < v in < v cc ? 10 +10 ? 10 +10 ? 10 +10 a i oz output leakage current gnd < v out < v cc , output disabled ? 10 +10 ? 10 +10 ? 10 +10 a i os output short circuit current [5] v cc = max., v out = gnd ? 20 ? 90 ? 20 ? 90 ? 20 ? 90 ma i cc power supply current v cc = max., i out = 0 ma commercial 100 100 90 ma military 120 120 v pp program voltage 12 13 12 13 12 13 v v ihp program high voltage 3.0 3.0 3.0 v v ilp program low voltage 0.4 0.4 0.4 v i pp program supply current 50 50 50 ma capacitance [4] parameter description test conditions max. unit c in input capacitance t a = 25 c, f = 1 mhz, v cc = 5.0v 10 pf c out output capacitance 10 pf note: 1. contact a cypress representative for industrial temperature range specifications. 2. t a is the ? instant on ? case temperature. 3. see the last page of this specification for group a subgroup testing information. 4. see ? introduction to cmos proms ? in this data book for general information on testing. 5. for test purposes, not more than one output at a time should be shorted. short circuit test duration should not exceed 30 sec onds.
CY7C281A cy7c282a document #: 38-04003 rev. ** page 3 of 11 programming information programming support is available from cypress as well as from a number of third party software vendors. for detailed programming information, including a listing of software pack- ages, please see the prom programming information located at the end of this section. programming algorithms can be ob- tained from any cypress representative. ac test loads and waveforms [4] 3.0v 5v output r1 250 ? r2 167 ? 30pf including jig and scope gnd 90% 10% 90% 10% 5ns 5 ns 5v output 5pf including jig and scope (a) normalload (b) highz load output 2.0v equivalent to: th venin equivalent 100 ? r1 250 ? r2 167 ? all input pulses switching characteristics over the operating range [3,4] 7c281a-25 7c282a-25 7c281a-30 7c282a-30 7c281a-45 7c282a-45 parameter description min. max. min. max. min. max. unit t aa address to output valid 25 30 45 ns t hzcs chip select inactive to high z 15 20 25 ns t acs chip select active to output valid 15 20 25 ns switching waveforms t aa c281a-7 t hzcs t acs a 0 ? a 9 address cs 3 ,cs 4 cs 1 ,cs 2 o 0 ? o 7 data selected deselected selected
CY7C281A cy7c282a document #: 38-04003 rev. ** page 4 of 11 table 1. mode selection pin function [6] read or output disable a 9 ? a 0 cs 4 cs 3 cs 2 cs 1 o 7 ? o 0 mode other a 9 ? a 0 pgm vfy v pp cs 1 d 7 ? d 0 read a 9 ? a 0 v ih v ih v il v il o 7 ? o 0 output disable a 9 ? a 0 x x v ih x high z output disable a 9 ? a 0 x v il x x high z output disable a 9 ? a 0 v il x x x high z output disable a 9 ? a 0 x x x v ih high z program a 9 ? a 0 v ilp v ihp v pp v ilp d 7 ? d 0 program verify a 9 ? a 0 v ihp v ilp v pp v ilp o 7 ? o 0 program inhibit a 9 ? a 0 v ihp v ihp v pp v ilp high z intelligent program a 9 ? a 0 v ilp v ihp v pp v ilp d 7 ? d 0 blank check a 9 ? a 0 v ihp v ilp v pp v ilp zeros note: 6. x = ? don ? t care ? but not to exceed v cc 5%. figure 1. programming pinouts 1 2 3 4 5 6 7 8 9 10 11 12 16 17 18 19 20 24 23 22 21 13 14 a 8 a 7 a 6 a 5 a 4 a 3 a 2 a 1 a 0 d 0 d 1 d 2 gnd v cc d 7 d 6 d 4 d 5 d 3 15 a 9 cs 1 v pp vfy pgm 28 4 5 6 7 8 9 10 321 27 1314151617 26 25 24 23 22 21 20 11 12 19 a 5 v cc gnd a 6 a 7 d 3 d 1 d 0 18 d 4 d 5 nc a 0 a 4 a 3 a 8 a 9 nc nc d 7 d 6 a 2 a 1 d 2 cs 1 v pp vfy pgm 7c281a 7c282a nc dip lcc/plcc top view top view 7c281a
CY7C281A cy7c282a document #: 38-04003 rev. ** page 5 of 11 typical dc and ac characteristics 1.4 1.6 1.0 0.8 4.0 4.5 5.0 5.5 6.0 ? 55 25 125 1.2 1.1 1.2 1.0 0.8 0.6 4.0 4.5 5.0 5.5 6.0 normalized access time supplyvoltage(v) normalized supply current vs. supply voltage normalized supply current vs. ambient temperature ambient temperature( c) supplyvoltage(v) normalized access time vs. supply voltage 0.6 1.2 1.0 0.9 0.8 normalized i cc normalized i cc t a =25 c 0.4 t a =25 c f= f max cc 1.6 1.4 1.2 1.0 0.8 ? 55 125 normalized access time ambient temperature ( c) normalized accesstime vs.temperature 0.6 60 50 40 30 20 10 01.0 2.03.0 output source current (ma) output voltage (v) 30.0 25.0 20.0 15.0 10.0 5.0 0 200 400 600 800 delta t (ns) aa capacitance (pf) typical access time change vs. output loading 4.0 0.0 1000 v cc =4.5v t a =25 c 25 0 output source current vs. voltage aa 150 175 125 75 50 25 0.0 1.0 2.0 3.0 output sink current (ma) 0 100 output voltage (v) output sink current vs. output voltage v cc =5.0v t a =25 c 4.0 1.00 1.02 0.98 0.94 0.92 0.90 025 5075 100 0.88 0.96 i cc vs.cycle period cycle period (ns) normalized i cc v cc =5.5v t a =25 c
CY7C281A cy7c282a document #: 38-04003 rev. ** page 6 of 11 military specifications group a subgroup testing ordering information speed (ns) ordering code package name package type operating range 25 CY7C281A-25dc d14 24-lead (300-mil) cerdip commercial CY7C281A-25jc j64 28-lead plastic leaded chip carrier CY7C281A-25pc p13 24-lead (300-mil) molded dip 30 CY7C281A-30dc d14 24-lead (300-mil) cerdip commercial CY7C281A-30jc j64 28-lead plastic leaded chip carrier CY7C281A-30pc p13 24-lead (300-mil) molded dip CY7C281A-30dmb d14 24-lead (300-mil) cerdip military 45 CY7C281A-45dc d14 24-lead (300-mil) cerdip commercial CY7C281A-45jc j64 28-lead plastic leaded chip carrier CY7C281A-45pc p13 24-lead (300-mil) molded dip CY7C281A-45dmb d14 24-lead (300-mil) cerdip military CY7C281A-45kmb k73 24-lead rectangular cerpack speed (ns) ordering code package name package type operating range 25 cy7c282a-25pc p11 24-lead (600-mil) molded dip commercial 30 cy7c282a-30pc p11 24-lead (600-mil) molded dip commercial cy7c282a-30dmb d12 24-lead (600-mil) cerdip military 45 cy7c282a-45pc p11 24-lead (600-mil) molded dip commercial cy7c282a-45dmb d12 24-lead (600-mil) cerdip military dc characteristics parameter subgroups v oh 1, 2, 3 v ol 1, 2, 3 v ih 1, 2, 3 v il 1, 2, 3 i ix 1, 2, 3 i oz 1, 2, 3 i cc 1, 2, 3 switching characteristics parameter subgroups t aa 7, 8, 9, 10, 11 t acs 7, 8, 9, 10, 11
CY7C281A cy7c282a document #: 38-04003 rev. ** page 7 of 11 package diagrams 24-lead (600-mil) cerdip d12 mil-std-1835 d-3 config. a 51-80038 24-lead (300-mil) cerdip d14 mil-std-1835 d- 9 config.a 51-80031
CY7C281A cy7c282a document #: 38-04003 rev. ** page 8 of 11 package diagrams (continued) 28-lead plastic leaded chip carrier j64 51-85001-a 24-lead rectangular cerpack k73 mil-std-1835 f-6 config. a 51-80060
CY7C281A cy7c282a document #: 38-04003 rev. ** page 9 of 11 package diagrams (continued) 28-square leadless chip carrier l64 mil-std-1835 c-4 51-80051 51-85016-a 24-lead (600-mil) molded dip p11
CY7C281A cy7c282a document #: 38-04003 rev. ** page 10 of 11 ? cypress semiconductor corporation, 2002. the information contained herein is subject to change without notice. cypress semico nductor corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a cypress semiconductor product. nor does it convey or imply any license unde r patent or other rights. cypress semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected t o result in significant injury to the user. the inclusion of cypress semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in do i ng so indemnifies cypress semiconductor against all charges. package diagrams (continued) 51-85013-a 24-lead (300-mil) molded dip p13/p13a
CY7C281A cy7c282a document #: 38-04003 rev. ** page 11 of 11 document title: CY7C281A, cy7c282a 1k x 8 prom document number: 38-04003 rev. ecn no. issue date orig. of change description of change ** 113859 03/06/02 dsg change from spec number: 38-00227 to 38-04003


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